[verilog] FSM and Sequence Detector
✏️ 1. FSM(Finite State Machine)
1.1) FSM정의
1.2) FSM : verilog code 기술방법
1.3) moore machine
1.4) mealy machine
✏️ 2. Sequence Detector
2.1) Sequence Detector이란?
2.2) 1010 non-Overlapping Mealy Sequence Detector
(1)FSM diagram

(2) Verilog

(3) rtl 확인

(4) test_bench code

(5) test bench 결과 확인

확인결과 ~~~임을 확인가능
2.3) 1010 Overlapping Mealy Sequence Detector
(1) FSM diagram

(2) Verilog

(3) rtl 확인

(4) test_bench code

(5) test bench 결과 확인

확인결과 ~~~임을 확인가능
2.4) 1010 non-Overlapping Moore Sequence Detector
(1) FSM diagram

(2) Verilog

(3) rtl 확인

(4) test_bench code

(5) test bench 결과 확인

확인결과 ~~~임을 확인가능
2.5) 1010 Overlapping Moore Sequence Detector
(1) FSM diagram

(2) Verilog

(3) rtl 확인

(4) test_bench code

(5) test bench 결과 확인

확인결과 ~~~임을 확인가능