Axioms and Definitions

Jinhoon Yoon·2026년 9월 22일

We will build the machine from pure mathematical axioms, one atomic definition at a time. Every claim will be supported by its formal definition.


Axiom 1: The Machine State as a Tuple

A 64-bit x86-64 CPU is a discrete deterministic state machine.
Its core state at any discrete clock step tt is a mathematical tuple:

St=⟨R,M,rip⟩\mathcal{S}_t = \langle \mathcal{R}, \mathcal{M}, \text{rip} \rangle

1. Registers (R\mathcal{R}): A finite set of sixteen named 64-bit words:

R={rax,rbx,rcx,rdx,rsi,rdi,rbp,rsp,r8…r15}\mathcal{R} = \{ \text{rax}, \text{rbx}, \text{rcx}, \text{rdx}, \text{rsi}, \text{rdi}, \text{rbp}, \text{rsp}, \text{r8} \dots \text{r15} \}

Each register is a function mapping a register name to an integer in {0,…,264−1}\{0, \dots, 2^{64}-1\}:

R:Name→W64\mathcal{R}: \text{Name} \to \mathbb{W}_{64}

2. Memory (M\mathcal{M}): A contiguous byte-addressable array:

M:W64→W8\mathcal{M}: \mathbb{W}_{64} \to \mathbb{W}_{8}

Reading an 8-byte word (64 bits) from address aa means
fetching the 8 consecutive bytes starting at address aa:

M64[a]=∑k=07M[a+k]⋅28k(Little-Endian representation)\mathcal{M}_{64}[a] = \sum_{k=0}^{7} \mathcal{M}[a+k] \cdot 2^{8k} \quad (\text{Little-Endian representation})

3. Instruction Pointer (rip\text{rip}): A single 64-bit scalar holding the memory address of the next instruction to execute:

rip∈W64\text{rip} \in \mathbb{W}_{64}


Axiom 2: Operand Syntax (Source →\to Destination)

In x86-64 AT&T syntax, an instruction is a transition function T:St→St+1\mathcal{T}: \mathcal{S}_t \to \mathcal{S}_{t+1}.The general syntax is strictly:

OPCODESource,Destination\text{OPCODE} \quad \text{Source}, \quad \text{Destination}

  • Rule of Data Flow:

The value is read from Source\text{Source}, modified by OPCODE\text{OPCODE}, and written to Destination\text{Destination}.

  • The Dollar Sign Prefix ($):

Denotes an immediate constant (a pure mathematical scalar c∈Zc \in \mathbb{Z}).

$0  ⟹  Value 00 \implies \text{Value } 0
$4  ⟹  Value 44 \implies \text{Value } 4

  • The Percent Sign Prefix (%):

Denotes a register name in R\mathcal{R}.

%rax

Concrete Evidence:

Instruction: movq $0, %rax\text{Instruction: } \texttt{movq \$0, \%rax}

  • Mathematical Definition: Rt+1[rax]←0\mathcal{R}_{t+1}[\text{rax}] \leftarrow 0
  • Proof of Direction:
    The source is $0 (left). The destination is %rax (right). The scalar 0 is placed into register rax.

Axiom 3: Address Calculation via Parentheses

Parentheses denote Memory Dereferencing (pointer arithmetic).
If k∈Zk \in \mathbb{Z} is an integer literal and reg∈R\text{reg} \in \mathcal{R}, the notation:

k(%reg)k(\text{\%reg})

evaluates to the physical memory location at the address:

Effective Address=R[reg]+k\text{Effective Address} = \mathcal{R}[\text{reg}] + k

Therefore:

movq Source,k(%reg)  ⟹  M64[R[reg]+k]←Value(Source)\texttt{movq } \text{Source}, \quad k(\text{\%reg}) \implies \mathcal{M}_{64}[\mathcal{R}[\text{reg}] + k] \leftarrow \text{Value}(\text{Source})

Concrete Evidence for -8(%rbp) and -24(%rbp):

Suppose %rbp currently holds the address 10001000 (i.e., R[rbp]=1000\mathcal{R}[\text{rbp}] = 1000).

  • Case 1: -8(%rbp)

Effective Address=1000+(−8)=992\text{Effective Address} = 1000 + (-8) = 992

The instruction movq $0, -8(%rbp) does:

M64[992]←0\mathcal{M}_{64}[992] \leftarrow 0

  • Case 2: -24(%rbp)

Effective Address=1000+(−24)=976\text{Effective Address} = 1000 + (-24) = 976

The instruction subq $1, -24(%rbp) does:

M64[976]←M64[976]−1\mathcal{M}_{64}[976] \leftarrow \mathcal{M}_{64}[976] - 1

Why did the compiler pick 992992 and 976976?

Because each 64-bit integer takes 8 bytes.

  • Byte interval for slot 1: [992,999][992, 999] (8 bytes wide   ⟹  \implies called sum in C).
  • Byte interval for slot 2: [976,983][976, 983] (8 bytes wide   ⟹  \implies called n in C).

Axiom 4: Arithmetic Transformation Rules

Let us formalize the four basic arithmetic instructions:

InstructionFormal State TransformationPlain Meaning
movq S, DD←SD \leftarrow SOverwrite DD with SS.
addq S, DD←D+SD \leftarrow D + SAdd SS to DD, store result in DD.
subq S, DD←D−SD \leftarrow D - SSubtract SS from DD, store result in DD.
cmpq S2, S1Discard (S1−S2)(S_1 - S_2), update Flags\text{Flags}Compare: compute S1−S2S_1 - S_2 only to set flags.

Crucial Detail on cmpq S2, S1:

The comparison computes Destination minus Source (Second−First\text{Second} - \text{First}).
Therefore, cmpq $0, %rax computes:

If R[rax]>0\mathcal{R}[\text{rax}] > 0, the result is positive, and the machine records "Greater Than".

Step-by-Step Mathematical Trace of 3 Instructions
Let the initial state at step t=0t=0 be:

  • R[rbp]=1000\mathcal{R}[\text{rbp}] = 1000
  • M64[992]=5\mathcal{M}_{64}[992] = 5 (the value at -8(%rbp))
  • R[rax]=10\mathcal{R}[\text{rax}] = 10

Step 1: movq $0, -8(%rbp)

  • Input State: M64[992]=5\mathcal{M}_{64}[992] = 5
  • Transformation: Write immediate constant 00 to address 1000−8=9921000 - 8 = 992.
  • Output State: M64[992]=0\mathcal{M}_{64}[992] = 0.

Step 2: addq $7, %rax

  • Input State: R[rax]=10\mathcal{R}[\text{rax}] = 10
  • Transformation: R[rax]←R[rax]+7=10+7=17\mathcal{R}[\text{rax}] \leftarrow \mathcal{R}[\text{rax}] + 7 = 10 + 7 = 17.
  • Output State: R[rax]=17\mathcal{R}[\text{rax}] = 17.

Step 3: subq $1, -8(%rbp)

  • Input State: M64[992]=0\mathcal{M}_{64}[992] = 0
  • Transformation: M64[992]←M64[992]−1=0−1=−1\mathcal{M}_{64}[992] \leftarrow \mathcal{M}_{64}[992] - 1 = 0 - 1 = -1.
  • Output State: M64[992]=−1\mathcal{M}_{64}[992] = -1 (stored as two's complement 0xFFFFFFFFFFFFFFFF).

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