Makefile

makefile을 이용하면 소스코드들을 간단하게 compile할 수 있음

$@: the file name of the target of the rule
$^: the names of all the prerequisite
$?: the name of all the prerequisites that are newer than the target

ex) main.c, plus.c, minus.c를 compile하는 경우의 Makefile 구성

TARGET=test
CXX=gcc
CXXFLAGS=-w
OBJECTS=main.o plus.o minus.o
$(TARGET): $(OBJECTS)
	$(CXX) $(CXXFLAGS) -o $@ $(OBJECTS)
main.o: main.c
	$(CXX) $(CXXFLAGS) -c main.c
plus.o: plus.c
	$(CXX) $(CXXFLAGS) -c plus.c
minus.o: minus.c
	#(CXX) $(CXXFLAGS) -c minus.c
clean:
	rm $(OBJECTS) $(TARGET)