CTS

• Sink Pins : 여기 까지 synthesis를 해라
• Ignore Pins : 이 핀 뒤로는 하지 마라

IP에 쓰이는 clk은 IP 내부까지 CTS 못하니까

set_clock_balance_points \
    -consider_for_balancing true \
    -clock <CLOCK> \
    -delay 0.15 -late \
    -balance_points [get_pins <IP/IP_CLK>]

consider_for_balancing
true : 뒤로 cts 한다
false : 뒤로 cts 안한다.

remove_clock_balance_points : balancing false 한거 취소

Mode 별로

foreach mode {m1 m2} {
    current_mode $mode
    set_clock_balance_points \
        -clock CLOCK \
        -consider_for_balancing false \
        -balance_points [get_pins <AN2//A>]
}

• CTS Cell Selection

set cts_libcells [get_lib_cells \
    "<*/INVX*_LVT> <*/BUFX8_LVT>"]
    
set_lib_cell_purpose -exclude cts [get_lib_cells]
set_lib_cell_purpose -include cts $cts_libcells
set_dont_touch $cts_libcells false

ICG

set_lib_cell_purpose -include cts <buf/inv/ao/ff>
derive_cllock_cell_references -output cts_leq_set.tcl

Synchronous clock

foreach mode {m1 m2} {
    current_mode $mode
    create_clock_balance_group -name grp1 \
        -objects [get_clocks "<CLOCK1> <CLOCK2>"]
}

derive_clock_balance_constraints -slack_less_than -0.3