LEVEL0 - Kmap

정다훈·2025년 6월 19일

Verilog study

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Karnaugh map - Introduction to Examples, About K-map, Problem Solving → 20min

module kmap
(
   input A,
   input B,
   input C,
   input D,
   output F_0,
   output F_1,
   output F_2
);

//#1 =====================================
//A B C D F_0
//0 0 0 0 0
//0 0 0 1 1
//0 0 1 0 1
//0 0 1 1 0
//0 1 0 0 1
//0 1 0 1 0
//0 1 1 0 0
//0 1 1 1 1
//1 0 0 0 1
//1 0 0 1 0
//1 0 1 0 0
//1 0 1 1 1
//1 1 0 0 0
//1 1 0 1 1
//1 1 1 0 1
//1 1 1 1 0

//TODO
assign F_0 = (~A & B & ~C & ~D)|
            (A & ~B & ~C & ~D) |
            (~A & ~B & ~C & ~D)|
            (A & B & ~C & D)   |
            (~A & B & C & D)   |
            (A & ~B & C & D)   |
            (~A & ~B & ~C & ~D)|
            (A & B & C & ~D)   |




// #2 ==================================
// A B C D F_1
// 0 0 0 0 0
// 0 0 0 1 0
// 0 0 1 0 0
// 0 0 1 1 0
// 0 1 0 0 0
// 0 1 0 1 1
// 0 1 1 0 1
// 0 1 1 1 1
// 1 0 0 0 1
// 1 0 0 1 0
// 1 0 1 0 1
// 1 0 1 1 1
// 1 1 0 0 0
// 1 1 0 1 1
// 1 1 1 0 1
// 1 1 1 1 1

//TODO
assign F_1 = (B & D) |
             (B & C) |
             (A & C & ~D)|
             (A & C)


//#3=========================================
// A B C D F_2  
// 0 0 0 0 0    
// 0 0 0 1 X    
// 0 0 1 0 1    
// 0 0 1 1 1    
// 0 1 0 0 0    
// 0 1 0 1 X    
// 0 1 1 0 1    
// 0 1 1 1 1    
// 1 0 0 0 1    
// 1 0 0 1 X    
// 1 0 1 0 0    
// 1 0 1 1 0    
// 1 1 0 0 1    
// 1 1 0 1 X    
// 1 1 1 0 1    
// 1 1 1 1 1    


//TODO
assign F_2 = (A & ~C) |
             (B & C)  |
             (~A & C) |

endmodule

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