CPU - ALU, CU, Cycle, and Interrupt

🔢 ALU (Arithmetic Logic Unit) — The Calculator of the CPU

Inputs:

• Operands (from registers)
• Control signal (from the Control Unit)

Outputs:

• Result, sent to a register
• Flags, sent to the Flag Register

Flags: Extra info about the result of the operation

🧠 Control Unit (CU) — The Director of the CPU

: The CU fetches instructions, decode them, and sends signal to components(like the ALU or memory) to carry out the task.

Inputs:

• Clock: Determine the timing
• Instructions: retrieve instructions from Instruction Register
• Flags: Used for control flow(like jump if zero)
• Signal from I/O Devices: Used for handling interrupts

Outputs:
1) Internal(Inside CPU)

• ALU: Send operation
• Registers: Control data movement and which registers to use
  2) External(Outside CPU)
• Memory: Control read/write
• I/O devices

📌 Addressing Modes

When the CU decodes the instruction, it checks the addressing mode, and then follows that logic to compute the effective address (EA) to access the data or instruction

Direct: Operand = memory address
Indirect: Operand = address of the address
Register: Operand is in a register
Register Indirect: Register contains memory address
Stack Addressing: Uses SP (stack pointer)
Displacement Addressing:
Relative: PC + operand
Base Register: base register + operand

🧠 LDR VS. STR:

str r3, [r7]      ; store r3 into memory pointed by r7
ldr r0, [r7]      ; load memory pointed by r7 into r0

// r3 = 99
// r7 = 0x2000

LDR = "load from memory into register"
STR = "store from register into memory"

🧠 Function Call Execution – Step-by-Step in Assembly

int add(int a, int b) {
    int result = a + b;
    return result;
}
int main() {
    int sum = add(3, 4);
}

// main()
main:
    MOV r0, #3              ; first argument (a)
    MOV r1, #4              ; second argument (b)
    BL add                  ; branch to add(), save return addr in lr(Link Register)
    STR r0, [fp, #-4]       ; store return value from r0 into stack

// add()
add:
    PUSH {fp, lr}           ; save frame pointer and return address
    ADD r2, r0, r1          ; result = a + b
    MOV r0, r2              ; return result in r0
    POP {fp, pc}            ; restore frame pointer and return

Instruction Cycle

Fetch: Fetch an instruction in memory to CPU
Indirect Cycle: If addressing mode is not direct, one step more to memory for effective address
Execution: CU decode instruction and send control signal

Interrupt

: Signal that interrupt the CPU instruction cycle

• Synchronous Interrupts: Interrupt by CPU when CPU faced an exception while executing instructions, ex) Exception
• Asynchronous Interrupts(hardware interrupt): Mainly by I/O device

The process of handling hardware interrupts
1) I/O devices send interrupt sign
2) After execution before fetch, CPU checks there is interruption
3) CPU checks the Interrupt Flag
4) If CPU accepts interrupt, then backup all the current process
5) CPU checks the interrupt vector to execute interrupt service routine
6) After service routine, retrieve the backup and execute them

On step4, CPU stores registers(PC etc) to stack