Progressive Sizing

In VLSI, progressive sizing means making transistors in a series stack gradually larger depending on their position, instead of giving every transistor the same width.

The goal is to reduce delay caused by the internal node capacitances and series resistance

Vout
 |
N1
 |
N2
 |
N3
 |
GND

Fan in, Fan out

Fanin = number of input to a gate
Fanout = number of gate to output

Good design
fanin <4
fanout<4

Late input

Late input should be close to output node

Gradually increase capacitance
gradually increase gate size

Area: increase
delay:decrease
power:increase