2.2 - (1) Introductions to RISC-V

1. RISC-V

• 수행되어야 할 operand 가 register 안에있는 형태로 CPU 는 register 를 통해서만 연산, 수행을 한다.
• Where are operands stored?

  • Operands are stored in 32 general purpose registers and a special register, PC (Program Counter)
    • Register, x0 is 0 and cannot be modified -> 0 is often used -> Minimize the memory access
    • PC holds the address of the next instruction to be executed
  • Size of register is 64-bit

• How many explicit operands are there?

  • (0,3) Register-Register (a.k.a load-store)

• Data is transferred between memory and register by 64-bit unit

  • the size of transferred data is same as the size of register

• The size of instruction is 32-bit unit

  • (0,3) R-R 구조 => add R3, R2, R1
    • Each operand R1, R2, R3 에서 5 bit 씩만 할당 -> 32 registers 만들 수 있다!
    • 나머지 17 bit 를 통해서 2^17 개의 operation 을 만들 수 있다 -> Instruction 이 32-bit 임에도 충분한 크기!

• Standard extesion

  • RV + word-width + extensions
    • ex) RV32I : 32-bit for Integer ISA

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2. Operation RISC-V

• Arithmetic or Logical (ALU) : add, sub, mul, div, etc
• Data transfer : between memory and register

  • load : load data from memory into register
  • store : store data from register into memory

• Control (Branch) : Conditional or Unconditional

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3. Signed and Unsigned Numbers

• Representation limit

  • Computer can express the number within the given bit range
  • If the number is larger than representable number, overflow happens
  • ex) if 32 bit, the range will be from -2^31 to 2^31 - 1

• How to express the sign of number

  • Use MSB as a sign bit
    • 0 -> positive, 1 -> negative
    • Easy to use and understand; however, subtraction is difficult and there are 2 zero expressions
      -> In 3-bit representation -> 0000 = 0, 1000 = -0

• Complement

  • 1's complement : Invert all bits
  • 2's complement : Invert all bits and add 1

• Sign extension

  • When converting a binary number in n bits to a binary number in m bits, take the MSB to fill up all the bits remaining